課程大綱

課程資訊
學年期 Semester	1142	課程代碼 Course Code	ET3305303
課程名稱 Course Title	數位邏輯設計 Digital Logic Design
學分數 Credits	3	選必修 Required/Elective	必修 /半學年
上課時間教室 Time/Location	T3(IB-502) T4(IB-502) W6(IB-305)
先修課程 Prerequisite(s)
授課教師 Lecturer	林昌鴻 Chang Hong Lin
專業核心能力 Core Professional Competencies

以下課程內容資料由授課教師提供
課程相關網址 Course Website	http://
課程宗旨 Objective of The Course	1.Binary Systems 2.Boolean Algebra and Logic Gates 3.Gate-level Minimization 4.Introduction to Verilog HDL 5.Combinational Logic 6.Synchronous Sequential Logic 7.Registers, Counters, and Memory 8.Introduction to Programmable Logic Devices 9.Register Transfer Level 10.Asynchronous Sequential Logic
課程大綱 Outline of Lectures	1.Binary Systems 2.Boolean Algebra and Logic Gates 3.Gate-level Minimization 4.Introduction to Verilog HDL 5.Combinational Logic 6.Synchronous Sequential Logic 7.Registers, Counters, and Memory 8.Introduction to Programmable Logic Devices 9.Register Transfer Level 10.Asynchronous Sequential Logic
教科書 Textbook	Digital Design with An Introduction to the Verilog HDL, VHDL, and SystemVerilog 6th edition, by M. Mano and Michael Ciletti, Pearson, 2018.
參考書目 References	N/A
修課學生須知 Notice of course enrollment	This course is intended to provide knowledge and understanding of digital logics and digital circuits, with concentration on the analysis and design of combinational and sequential logic circuits. Furthermore, this course provides a foundation for subsequent study in computer organization/architecture, digital system design, and VLSI design.
評量方式 Grading	Homework and Class Participation: 20% Midterm Exam: 35% Final Exam: 45%
備註說明 Note	N/A